From ec2530c9b532a834777b90fbf34e880aa02395fa Mon Sep 17 00:00:00 2001 From: Mikael Voss Date: Wed, 6 Nov 2024 12:21:48 +0100 Subject: [PATCH] Add basic platform config for Supermicro H11SSW --- flake.nix | 1 + platform/supermicro-h11ssw.nix | 75 ++++++++++++++++++++++++++++++++++ 2 files changed, 76 insertions(+) create mode 100644 platform/supermicro-h11ssw.nix diff --git a/flake.nix b/flake.nix index 41cea90..0b0cf24 100644 --- a/flake.nix +++ b/flake.nix @@ -34,6 +34,7 @@ package = packageWith nixpkgs.legacyPackages.x86_64-linux; in { default = package { }; + supermicro-h11ssw = package ./platform/supermicro-h11ssw.nix; thinkpad-x1-extreme-gen5 = package ./platform/thinkpad-x1-extreme-gen5.nix; }; }; diff --git a/platform/supermicro-h11ssw.nix b/platform/supermicro-h11ssw.nix new file mode 100644 index 0000000..a06179b --- /dev/null +++ b/platform/supermicro-h11ssw.nix @@ -0,0 +1,75 @@ +{ + instSetArch = "znver2"; + profiles = { + physical = true; + }; + + platformConfig = { option, lib, hostPlatform }: { + CPU_SUP_INTEL = false; + CPU_SUP_AMD = true; + NR_CPUS = 96; + AMD_MEM_ENCRYPT = true; + + ACPI_IPMI = true; + ACPI_HMAT = true; + + VIRTUALIZATION = true; + KVM = true; + KVM_AMD = true; + KVM_SMM = true; + + NVME_CORE = true; + BLK_DEV_NVME = true; + NVME_VERBOSE_ERRORS = true; + NVME_HWMON = true; + + ATA = true; + ATA_VERBOSE_ERROR = true; + ATA_ACPI = true; + SATA_PMP = true; + SATA_AHCI = true; + SATA_MOBILE_LPM_POLICY = 1; + ATA_SFF = false; + + BNXT = true; + BNXT_FLOWER_OFFLOAD = true; + BNXT_HWMON = true; + + IPMI_HANDLER = true; + IPMI_PANIC_EVENT = true; + IPMI_PANIC_STRING = true; + IPMI_DEVICE_INTERFACE = true; + IPMI_SI = true; + IPMI_SSIF = true; + + I2C_PIIX4 = true; + + HWMON = true; + SENSORS_K10TEMP = true; + + WATCHDOG = true; + WATCHDOG_HANDLE_BOOT_ENABLED = true; + WATCHDOG_OPEN_TIMEOUT = 0; + WATCHDOG_SYSFS = true; + SP5100_TCO = true; + + VIDEO = true; + DRM = true; + DRM_FBDEV_EMULATION = true; + DRM_AST = true; + + EDAC_DECODE_MCE = true; + EDAC_AMD64 = true; + + AMD_PTDMA = true; + AMD_IOMMU = true; + + INTEL_RAPL = true; + + CRYPTO_DEV_CCP = true; + CRYPTO_DEV_CCP_DD = true; + CRYPTO_DEV_SP_CCP = true; + CRYPTO_DEV_CCP_CRYPTO = true; + CRYPTO_DEV_SP_PSP = true; + }; +}